RTL Verification

Frontend design/verification Directed processor based (assembly/C) based verification Exposure Arm processors APB/AHB/AXI protocol understanding Understanding exposure to SoC verification env and standard peripheral knowledge. Code coverage analysis and closure Behavioral model Test bench development Random verification (Added advantage) System Verilog coding BFM/Scoreboard development VMM/OVM/UVM methodology understanding Functional coverage driven verification Working with Standard tools NCSIM, VCS Gate level simulation/debug Scripting language exposure